The present invention relates to an analog-to-digital (hereinafter referred to as "A/D") converter, particularly the high-speed and high-precision A/D converter which is suited for use in integrated circuits.
The A/D converter related to the present invention is described in Japanese Patent Application Laid-Open No. 5623026.
The structure of a 4-bit half-flash A/D converter using the aforementioned conventional technology is shown in FIG. 9. This A/D converter is comprised of a resistor-string 11 which is connected between constant voltage sources V.sub.RT and V.sub.RB (In this specification, the voltage values of these voltage sources are also shown as V.sub.RT and V.sub.RB. Voltage V.sub.RT is greater than V.sub.RB.), voltage comparators for upper bits 16, 17 and 18 which use the partial voltages that were taken out from the position where this resistor-string 11 was divided into four sets as reference voltages and compare them with input signal V.sub.i a selector and an encoder 5 which output digital value by using this output from the comparators 16-18 as input while outputting a signal for selecting a set of reference voltage obtained from the resistor-string that has been divided into four sets, selection switches 91, 92, 93, 94 which take out partial voltages from a set of resistor-string that has been selected, voltage comparators for lower bits 21, 22 and 23 which use the partial voltages that were taken out via these selection switches 91-94 as reference voltages and compare them with input signal V.sub.i, an encoder 6 which outputs digital value of lower bits from the output of voltage comparators 21-23, and an output circuit 10 which combines the outputs of a selector encoder 5 and an encoder 6 and outputs 4 bit digital value.